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Verilator is a static analysis tool for Verilog and SystemVerilog hardware designs. CodeRabbit runs Verilator version 5.052.

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Files

Verilator runs on changed files with the following extensions:
  • .v
  • .sv

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Configuration

Verilator is enabled by default. Enable or disable it with .coderabbit.yaml or the CodeRabbit web UI:
.coderabbit.yaml
Findings appear inline with Verilator rule identifiers, affected line ranges, and severity.

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Security policy and restrictions

CodeRabbit runs Verilator in a sandbox with a fixed lint-only invocation. It does not load repository-supplied plugins, command files, compiler flags, or generate executable models.

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Profile behavior

Verilator uses the same invocation in Chill and Assertive modes.

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When we skip Verilator

CodeRabbit skips Verilator when:
  • The pull request has no changed .v or .sv files.
  • reviews.tools.verilator.enabled is set to false.
  • Verilator is already running in GitHub Actions, GitLab CI, CircleCI, or Azure Pipelines.